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PD - 91502C
IRL3705NS/L
Logic-Level Gate Drive l Advanced Process Technology l Surface Mount (IRL3705NS) l Low-profile through-hole (IRL3705NL) l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated Description
l
HEXFET(R) Power MOSFET
D
VDSS = 55V RDS(on) = 0.01
G
ID = 89A
S
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL3705NL) is available for lowprofile applications.
D 2 P ak
T O -26 2
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
89 63 310 3.8 170 1.1 16 340 46 1.7 5.0 -55 to + 175 300 (1.6mm from case )
Units
A W W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
--- ---
Max.
0.90 40
Units
C/W 5/12/98
IRL3705NS/L
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 55 --- --- --- --- 1.0 50 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- 0.056 --- --- --- --- --- --- --- --- --- --- --- --- 12 140 37 78 Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.010 VGS = 10V, ID = 46A 0.012 VGS = 5.0V, ID = 46A 0.018 VGS = 4.0V, ID = 39A 2.0 V VDS = VGS , ID = 250A --- S VDS = 25V, ID = 46A 25 VDS = 55V, VGS = 0V A 250 VDS = 44V, VGS = 0V, TJ = 150C 100 VGS = 16V nA -100 VGS = -16V 98 ID = 46A 19 nC VDS = 44V 49 VGS = 5.0V, See Fig. 6 and 13 --- VDD = 28V --- ID = 46A ns --- RG = 1.8, VGS = 5.0V --- RD = 0.59, See Fig. 10 Between lead, 7.5 --- nH and center of die contact 3600 --- VGS = 0V 870 --- pF VDS = 25V 320 --- = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
V SD t rr Q rr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 89 showing the A G integral reverse --- --- 310 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 46A, VGS = 0V --- 94 140 ns TJ = 25C, IF = 46A --- 290 440 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%. Uses IRL3705N data and test conditions Calculated continuous current based on maximum allowable
VDD = 25V, starting TJ = 25C, L = 320H
RG = 25, IAS = 46A. (See Figure 12)
ISD 46A, di/dt 250A/s, VDD V(BR)DSS,
TJ 175C
junction temperature; for recommended current-handling of the package refer to Design Tip # 93-4 ** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.
IRL3705NS/L
1000
TOP VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V
1000
ID , D rain-to-S ource C urrent (A )
ID , Drain-to-Source Current (A )
VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP
100
100
10
10
2 .5V
2.5V 2 0 s P U LS E W ID T H T J = 2 5C
0.1 1 10
1
A
1 0.1 1
2 0 s P U LS E W ID TH T J = 1 75 C
10
100
100
A
V D S , D rain-to-S ource V oltage (V )
V D S , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.0
R D S (on ) , D rain-to-S ource O n R esistance (N orm alized)
I D = 7 7A
I D , D ra in -to-S ourc e C urrent (A)
TJ = 2 5 C
100
2.5
T J = 1 7 5 C
2.0
1.5
10
1.0
0.5
1 2.0 3.0 4.0 5.0
V D S= 2 5 V 2 0 s P U L S E W ID T H
6.0 7.0 8.0
A
0.0 -60 -40 -20 0 20 40 60 80
V G S = 10 V
100 120 140 160 180
A
V G S , G a te -to -S o u rc e V o lta g e (V )
T J , Junction T em perature (C )
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRL3705NS/L
6000
5000
4000
V G S , G ate-to-S ource V oltage (V )
V GS C iss C rs s C iss C o ss
= = = =
0V , f = 1MHz C g s + C g d , C d s S H O R TE D C gd C ds + C g d
15
I D = 46 A V D S = 44 V V D S = 28 V
12
C , Capacitance (pF)
9
3000
C oss
6
2000
C rss
1000
3
0 1 10 100
A
0 0 20 40 60
FO R TE S T C IR C U IT S E E FIG U R E 1 3
80 100 120 140
A
V D S , D rain-to-S ourc e V oltage (V )
Q G , T otal G ate C harge (nC )
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
I S D , Reverse D rain C urrent (A)
O P E R A T IO N IN T H IS A R E A L IM ITE D B Y R D S (o n)
10 s 100 100 s
100
T J = 17 5C T J = 2 5C
I D , D rain Current (A )
1m s 10 10m s
10 0.4 0.8 1.2 1.6 2.0
V G S = 0V
2.4
A
1 1
T C = 25 C T J = 17 5C S ing le P u lse
10 100
A
2.8
V S D , S ourc e-to-D rain V oltage (V )
V D S , D rain-to-S ource V oltage (V )
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRL3705NS/L
100
LIMITED BY PACKAGE
80
VDS VGS RG
RD
D.U.T. V DD +
I D , Drain Current (A)
60
5.0V
Pulse Width 1 s Duty Factor 0.1 %
40
Fig 10a. Switching Time Test Circuit
20
VDS 90%
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50
0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.1
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRL3705NS/L
800
E A S , S ingle Pulse Avalanc he E nergy (m J)
TOP B O TT O M
600
1 5V
ID 19 A 3 3A 46 A
VD S
L
D R IV E R
400
RG
10V
D .U .T IA S tp 0.0 1
+ - VD D
A
200
Fig 12a. Unclamped Inductive Test Circuit
0
V D D = 25 V
25 50 75 100 125 150
A
175
V (B R )D SS tp
S tarting T J , J unc tion T em perature (C )
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
5.0 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
IRL3705NS/L
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ V DD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
IRL3705NS/L
D2Pak Package Outline
1 0.54 (.4 15) 1 0.29 (.4 05) 1.4 0 (.055 ) M AX. -A2
4.69 (.1 85) 4.20 (.1 65)
-B 1.3 2 (.05 2) 1.2 2 (.04 8)
1 0.16 (.4 00 ) RE F.
6.47 (.2 55 ) 6.18 (.2 43 ) 15 .4 9 (.6 10) 14 .7 3 (.5 80) 5 .28 (.20 8) 4 .78 (.18 8) 2.7 9 (.110 ) 2.2 9 (.090 ) 2.61 (.1 03 ) 2.32 (.0 91 ) 1.3 9 (.0 5 5) 1.1 4 (.0 4 5) 8.8 9 (.3 50 ) R E F.
1.7 8 (.07 0) 1.2 7 (.05 0)
1
3
3X
1.40 (.0 55) 1.14 (.0 45) 5 .08 (.20 0)
0 .93 (.03 7 ) 3X 0 .69 (.02 7 ) 0 .25 (.01 0 ) M BAM
0.5 5 (.022 ) 0.4 6 (.018 )
M IN IM U M R E CO M M E ND E D F O O TP R IN T 1 1.43 (.4 50 )
NO TE S: 1 D IM EN S IO N S A FTER SO L D ER D IP. 2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2. 3 C O N TRO L LIN G D IM EN SIO N : IN C H . 4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S.
LE A D A SS IG N M E N TS 1 - G A TE 2 - D R AIN 3 - S O U RC E
8.89 (.3 50 ) 17 .78 (.70 0)
3 .8 1 (.15 0) 2 .08 (.08 2) 2X 2.5 4 (.100 ) 2X
Part Marking Information
D2Pak
IN TE R N A TIO N A L R E C T IF IE R LO G O A S S E M B LY LO T C O D E
PART NUM BER F530S 9 24 6 9B 1M
A
DATE CODE (Y YW W ) YY = Y E A R W W = W EEK
IRL3705NS/L
Package Outline
TO-262 Outline
Part Marking Information
TO-262
IRL3705NS/L
Tape & Reel Information
D2Pak
TR R
1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 (.1 6 1 ) 3 .9 0 (.1 5 3 )
1 .60 (.06 3) 1 .50 (.05 9) 0 .3 68 (.0 1 4 5 ) 0 .3 42 (.0 1 3 5 )
F E E D D IRE CTIO N 1 .8 5 (.0 7 3 )
1 .6 5 (.0 6 5 )
1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 )
1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 )
2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 )
TR L
10 .9 0 (.42 9) 10 .7 0 (.42 1) 1 .75 (.06 9 ) 1 .25 (.04 9 ) 16 .10 (.63 4 ) 15 .90 (.62 6 ) 4 .7 2 (.1 3 6) 4 .5 2 (.1 7 8)
F E E D D IRE C TIO N
13.50 (.532 ) 12.80 (.504 )
2 7.4 0 (1.079) 2 3.9 0 (.9 41)
4
33 0.00 (1 4.1 73) MA X.
60.00 (2.3 62) MIN .
NO TES : 1. C O M F O R M S TO E IA -4 18. 2. C O N TR O LLIN G D IM E N S IO N : M ILL IM ET ER . 3. D IM E N S IO N ME A S U R E D @ H U B . 4. IN C LU D E S F LA N G E D IS TO R T IO N @ O U T E R E D G E .
26 .40 (1.03 9) 24 .40 (.961 ) 3
3 0.40 (1.1 97) MAX. 4
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 5/98

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